1 | #ifndef _CPU_X86_64_H |
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2 | #define _CPU_X86_64_H |
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3 | |
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4 | /* x86_64 cpu.h */ |
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5 | |
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6 | static inline uint64_t rdtsc(void) |
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7 | { |
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8 | uint64_t v; |
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9 | asm volatile("rdtsc" : "=A" (v)); |
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10 | return v; |
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11 | } |
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12 | |
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13 | static inline uint32_t rdtscl(void) |
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14 | { |
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15 | uint32_t v; |
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16 | asm volatile("rdtsc" : "=a" (v) : : "edx"); |
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17 | return v; |
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18 | } |
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19 | |
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20 | static inline void native_cpuid(unsigned int *eax, unsigned int *ebx, |
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21 | unsigned int *ecx, unsigned int *edx) |
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22 | { |
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23 | /* ecx is often an input as well as an output. */ |
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24 | asm volatile("cpuid" |
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25 | : "=a" (*eax), |
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26 | "=b" (*ebx), |
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27 | "=c" (*ecx), |
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28 | "=d" (*edx) |
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29 | : "0" (*eax), "2" (*ecx) |
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30 | : "memory"); |
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31 | } |
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32 | /* |
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33 | * Generic CPUID function |
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34 | * clear %ecx since some cpus (Cyrix MII) do not set or clear %ecx |
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35 | * resulting in stale register contents being returned. |
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36 | */ |
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37 | static inline void cpuid(uint32_t op, |
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38 | uint32_t *eax, uint32_t *ebx, |
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39 | uint32_t *ecx, uint32_t *edx) |
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40 | { |
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41 | *eax = op; |
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42 | *ecx = 0; |
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43 | native_cpuid(eax, ebx, ecx, edx); |
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44 | } |
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45 | |
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46 | /* |
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47 | * CPUID functions returning a single datum |
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48 | */ |
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49 | static inline uint32_t cpuid_eax(uint32_t op) |
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50 | { |
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51 | uint32_t eax, ebx, ecx, edx; |
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52 | |
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53 | cpuid(op, &eax, &ebx, &ecx, &edx); |
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54 | |
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55 | return eax; |
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56 | } |
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57 | |
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58 | static inline uint32_t cpuid_ebx(uint32_t op) |
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59 | { |
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60 | uint32_t eax, ebx, ecx, edx; |
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61 | |
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62 | cpuid(op, &eax, &ebx, &ecx, &edx); |
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63 | |
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64 | return ebx; |
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65 | } |
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66 | |
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67 | static inline uint32_t cpuid_ecx(uint32_t op) |
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68 | { |
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69 | uint32_t eax, ebx, ecx, edx; |
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70 | |
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71 | cpuid(op, &eax, &ebx, &ecx, &edx); |
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72 | |
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73 | return ecx; |
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74 | } |
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75 | |
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76 | static inline uint32_t cpuid_edx(uint32_t op) |
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77 | { |
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78 | uint32_t eax, ebx, ecx, edx; |
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79 | |
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80 | cpuid(op, &eax, &ebx, &ecx, &edx); |
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81 | |
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82 | return edx; |
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83 | } |
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84 | |
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85 | static inline void cpuid_count(uint32_t op, uint32_t cnt, |
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86 | uint32_t * eax, uint32_t * ebx, |
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87 | uint32_t * ecx, uint32_t * edx) |
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88 | { |
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89 | asm volatile("movl %%ebx,%1 ; " |
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90 | "cpuid ; " |
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91 | "xchgl %1,%%ebx" |
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92 | : "=a" (*eax), "=SD" (*ebx), "=c" (*ecx), "=d" (*edx) |
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93 | : "a"(op), "c"(cnt)); |
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94 | } |
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95 | |
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96 | static inline uint64_t rdmsr(uint32_t msr) |
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97 | { |
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98 | uint64_t v; |
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99 | |
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100 | asm volatile("rdmsr" : "=A" (v) : "c"(msr)); |
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101 | return v; |
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102 | } |
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103 | |
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104 | static inline void wrmsr(uint64_t v, uint32_t msr) |
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105 | { |
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106 | asm volatile("wrmsr" : : "A" (v), "c" (msr)); |
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107 | } |
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108 | |
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109 | static inline void cpu_relax(void) |
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110 | { |
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111 | asm volatile("rep ; nop" : : : "memory"); |
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112 | } |
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113 | |
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114 | static inline void hlt(void) |
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115 | { |
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116 | asm volatile("hlt" : : : "memory"); |
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117 | } |
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118 | |
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119 | static inline void cli(void) |
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120 | { |
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121 | asm volatile("cli" : : : "memory"); |
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122 | } |
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123 | |
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124 | static inline void sti(void) |
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125 | { |
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126 | asm volatile("sti" : : : "memory"); |
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127 | } |
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128 | #endif |
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