[e16e8f2] | 1 | ;; ----------------------------------------------------------------------- |
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| 2 | ;; |
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| 3 | ;; Copyright 1994-2009 H. Peter Anvin - All Rights Reserved |
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| 4 | ;; Copyright 2009 Intel Corporation; author: H. Peter Anvin |
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| 5 | ;; |
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| 6 | ;; This program is free software; you can redistribute it and/or modify |
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| 7 | ;; it under the terms of the GNU General Public License as published by |
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| 8 | ;; the Free Software Foundation, Inc., 53 Temple Place Ste 330, |
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| 9 | ;; Boston MA 02111-1307, USA; either version 2 of the License, or |
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| 10 | ;; (at your option) any later version; incorporated herein by reference. |
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| 11 | ;; |
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| 12 | ;; ----------------------------------------------------------------------- |
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| 13 | |
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| 14 | ;; |
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| 15 | ;; pm.inc |
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| 16 | ;; |
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| 17 | ;; Functions to enter and exit 32-bit protected mode, handle interrupts |
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| 18 | ;; and cross-mode calls. |
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| 19 | ;; |
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| 20 | ;; PM refers to 32-bit flat protected mode; RM to 16-bit real mode. |
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| 21 | ;; |
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| 22 | |
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| 23 | bits 16 |
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| 24 | section .text16 |
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| 25 | ; |
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| 26 | ; _pm_call: call PM routine in low memory from RM |
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| 27 | ; |
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| 28 | ; on stack = PM routine to call (a 32-bit address) |
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| 29 | ; |
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| 30 | ; ECX, ESI, EDI passed to the called function; |
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| 31 | ; EAX = EBP in the called function points to the stack frame |
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| 32 | ; which includes all registers (which can be changed if desired.) |
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| 33 | ; |
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| 34 | ; All registers and the flags saved/restored |
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| 35 | ; |
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| 36 | ; This routine is invoked by the pm_call macro. |
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| 37 | ; |
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| 38 | _pm_call: |
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| 39 | pushfd |
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| 40 | pushad |
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| 41 | push ds |
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| 42 | push es |
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| 43 | push fs |
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| 44 | push gs |
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| 45 | mov bp,sp |
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| 46 | mov ax,cs |
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| 47 | mov ebx,.pm |
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| 48 | mov ds,ax |
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| 49 | jmp enter_pm |
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| 50 | |
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| 51 | bits 32 |
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| 52 | section .textnr |
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| 53 | .pm: |
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| 54 | ; EAX points to the top of the RM stack, which is EFLAGS |
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| 55 | test RM_FLAGSH,02h ; RM EFLAGS.IF |
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| 56 | jz .no_sti |
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| 57 | sti |
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| 58 | .no_sti: |
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| 59 | call [ebp+4*2+9*4+2] ; Entrypoint on RM stack |
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| 60 | mov bx,.rm |
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| 61 | jmp enter_rm |
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| 62 | |
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| 63 | bits 16 |
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| 64 | section .text16 |
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| 65 | .rm: |
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| 66 | pop gs |
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| 67 | pop fs |
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| 68 | pop es |
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| 69 | pop ds |
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| 70 | popad |
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| 71 | popfd |
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| 72 | ret 4 ; Drop entrypoint |
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| 73 | |
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| 74 | ; |
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| 75 | ; enter_pm: Go to PM with interrupt service configured |
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| 76 | ; EBX = PM entry point |
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| 77 | ; EAX = EBP = on exit, points to the RM stack as a 32-bit value |
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| 78 | ; ECX, EDX, ESI, EDI preserved across this routine |
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| 79 | ; |
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| 80 | ; Assumes CS == DS |
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| 81 | ; |
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| 82 | ; This routine doesn't enable interrupts, but the target routine |
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| 83 | ; can enable interrupts by executing STI. |
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| 84 | ; |
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| 85 | bits 16 |
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| 86 | section .text16 |
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| 87 | enter_pm: |
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| 88 | cli |
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| 89 | xor eax,eax |
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| 90 | mov ds,ax |
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| 91 | mov ax,ss |
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| 92 | mov [RealModeSSSP],sp |
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| 93 | mov [RealModeSSSP+2],ax |
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| 94 | movzx ebp,sp |
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| 95 | shl eax,4 |
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| 96 | add ebp,eax ; EBP -> top of real-mode stack |
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| 97 | cld |
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| 98 | call enable_a20 |
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| 99 | |
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| 100 | .a20ok: |
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| 101 | mov byte [bcopy_gdt.TSS+5],89h ; Mark TSS unbusy |
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| 102 | |
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| 103 | lgdt [bcopy_gdt] ; We can use the same GDT just fine |
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| 104 | lidt [PM_IDT_ptr] ; Set up the IDT |
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| 105 | mov eax,cr0 |
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| 106 | or al,1 |
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| 107 | mov cr0,eax ; Enter protected mode |
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| 108 | jmp PM_CS32:.in_pm |
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| 109 | |
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| 110 | bits 32 |
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| 111 | section .textnr |
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| 112 | .in_pm: |
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| 113 | xor eax,eax ; Available for future use... |
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| 114 | mov fs,eax |
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| 115 | mov gs,eax |
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| 116 | lldt ax |
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| 117 | |
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| 118 | mov al,PM_DS32 ; Set up data segments |
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| 119 | mov es,eax |
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| 120 | mov ds,eax |
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| 121 | mov ss,eax |
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| 122 | |
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| 123 | mov al,PM_TSS ; Be nice to Intel's VT by |
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| 124 | ltr ax ; giving it a valid TR |
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| 125 | |
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| 126 | mov esp,[PMESP] ; Load protmode %esp |
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| 127 | mov eax,ebp ; EAX -> top of real-mode stack |
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| 128 | jmp ebx ; Go to where we need to go |
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| 129 | |
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| 130 | ; |
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| 131 | ; enter_rm: Return to RM from PM |
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| 132 | ; |
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| 133 | ; BX = RM entry point (CS = 0) |
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| 134 | ; ECX, EDX, ESI, EDI preserved across this routine |
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| 135 | ; EAX clobbered |
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| 136 | ; EBP reserved |
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| 137 | ; |
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| 138 | ; This routine doesn't enable interrupts, but the target routine |
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| 139 | ; can enable interrupts by executing STI. |
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| 140 | ; |
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| 141 | bits 32 |
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| 142 | section .textnr |
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| 143 | enter_rm: |
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| 144 | cli |
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| 145 | cld |
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| 146 | mov [PMESP],esp ; Save exit %esp |
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| 147 | jmp PM_CS16:.in_pm16 ; Return to 16-bit mode first |
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| 148 | |
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| 149 | bits 16 |
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| 150 | section .text16 |
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| 151 | .in_pm16: |
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| 152 | mov ax,PM_DS16 ; Real-mode-like segment |
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| 153 | mov es,ax |
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| 154 | mov ds,ax |
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| 155 | mov ss,ax |
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| 156 | mov fs,ax |
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| 157 | mov gs,ax |
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| 158 | |
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| 159 | lidt [RM_IDT_ptr] ; Real-mode IDT (rm needs no GDT) |
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| 160 | xor dx,dx |
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| 161 | mov eax,cr0 |
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| 162 | and al,~1 |
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| 163 | mov cr0,eax |
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| 164 | jmp 0:.in_rm |
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| 165 | |
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| 166 | .in_rm: ; Back in real mode |
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| 167 | lss sp,[cs:RealModeSSSP] ; Restore stack |
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| 168 | movzx esp,sp ; Make sure the high bits are zero |
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| 169 | mov ds,dx ; Set up sane segments |
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| 170 | mov es,dx |
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| 171 | mov fs,dx |
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| 172 | mov gs,dx |
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| 173 | jmp bx ; Go to whereever we need to go... |
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| 174 | |
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| 175 | section .data16 |
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| 176 | alignz 4 |
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| 177 | |
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| 178 | extern __stack_end |
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| 179 | PMESP dd __stack_end ; Protected-mode ESP |
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| 180 | |
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| 181 | PM_IDT_ptr: dw 8*256-1 ; Length |
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| 182 | dd IDT ; Offset |
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| 183 | |
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| 184 | ; |
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| 185 | ; This is invoked on getting an interrupt in protected mode. At |
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| 186 | ; this point, we need to context-switch to real mode and invoke |
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| 187 | ; the interrupt routine. |
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| 188 | ; |
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| 189 | ; When this gets invoked, the registers are saved on the stack and |
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| 190 | ; AL contains the register number. |
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| 191 | ; |
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| 192 | bits 32 |
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| 193 | section .textnr |
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| 194 | pm_irq: |
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| 195 | pushad |
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| 196 | movzx esi,byte [esp+8*4] ; Interrupt number |
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| 197 | inc dword [CallbackCtr] |
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| 198 | mov ebx,.rm |
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| 199 | jmp enter_rm ; Go to real mode |
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| 200 | |
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| 201 | bits 16 |
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| 202 | section .text16 |
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| 203 | .rm: |
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| 204 | pushf ; Flags on stack |
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| 205 | call far [cs:esi*4] ; Call IVT entry |
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| 206 | mov ebx,.pm |
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| 207 | jmp enter_pm ; Go back to PM |
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| 208 | |
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| 209 | bits 32 |
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| 210 | section .textnr |
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| 211 | .pm: |
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| 212 | dec dword [CallbackCtr] |
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| 213 | jnz .skip |
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| 214 | call [core_pm_hook] |
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| 215 | .skip: |
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| 216 | popad |
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| 217 | add esp,4 ; Drop interrupt number |
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| 218 | iretd |
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| 219 | |
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| 220 | ; |
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| 221 | ; Initially, the core_pm_hook does nothing; it is available for the |
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| 222 | ; threaded derivatives to run the scheduler, or examine the result from |
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| 223 | ; interrupt routines. |
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| 224 | ; |
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| 225 | global core_pm_null_hook |
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| 226 | core_pm_null_hook: |
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| 227 | ret |
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| 228 | |
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| 229 | section .data16 |
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| 230 | alignz 4 |
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| 231 | global core_pm_hook |
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| 232 | core_pm_hook: dd core_pm_null_hook |
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| 233 | |
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| 234 | bits 16 |
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| 235 | section .text16 |
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| 236 | ; |
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| 237 | ; Routines to enable and disable (yuck) A20. These routines are gathered |
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| 238 | ; from tips from a couple of sources, including the Linux kernel and |
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| 239 | ; http://www.x86.org/. The need for the delay to be as large as given here |
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| 240 | ; is indicated by Donnie Barnes of RedHat, the problematic system being an |
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| 241 | ; IBM ThinkPad 760EL. |
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| 242 | ; |
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| 243 | |
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| 244 | section .data16 |
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| 245 | alignz 2 |
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| 246 | A20Ptr dw a20_dunno |
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| 247 | |
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| 248 | section .bss16 |
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| 249 | alignb 4 |
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| 250 | A20Test resd 1 ; Counter for testing A20 status |
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| 251 | A20Tries resb 1 ; Times until giving up on A20 |
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| 252 | |
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| 253 | section .text16 |
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| 254 | enable_a20: |
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| 255 | pushad |
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| 256 | mov byte [cs:A20Tries],255 ; Times to try to make this work |
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| 257 | |
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| 258 | try_enable_a20: |
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| 259 | |
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| 260 | ; |
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| 261 | ; First, see if we are on a system with no A20 gate, or the A20 gate |
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| 262 | ; is already enabled for us... |
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| 263 | ; |
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| 264 | a20_none: |
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| 265 | call a20_test |
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| 266 | jnz a20_done |
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| 267 | ; Otherwise, see if we had something memorized... |
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| 268 | jmp word [cs:A20Ptr] |
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| 269 | |
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| 270 | ; |
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| 271 | ; Next, try the BIOS (INT 15h AX=2401h) |
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| 272 | ; |
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| 273 | a20_dunno: |
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| 274 | a20_bios: |
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| 275 | mov word [cs:A20Ptr], a20_bios |
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| 276 | mov ax,2401h |
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| 277 | pushf ; Some BIOSes muck with IF |
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| 278 | int 15h |
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| 279 | popf |
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| 280 | |
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| 281 | call a20_test |
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| 282 | jnz a20_done |
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| 283 | |
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| 284 | ; |
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| 285 | ; Enable the keyboard controller A20 gate |
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| 286 | ; |
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| 287 | a20_kbc: |
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| 288 | mov dl, 1 ; Allow early exit |
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| 289 | call empty_8042 |
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| 290 | jnz a20_done ; A20 live, no need to use KBC |
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| 291 | |
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| 292 | mov word [cs:A20Ptr], a20_kbc ; Starting KBC command sequence |
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| 293 | |
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| 294 | mov al,0D1h ; Write output port |
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| 295 | out 064h, al |
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| 296 | call empty_8042_uncond |
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| 297 | |
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| 298 | mov al,0DFh ; A20 on |
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| 299 | out 060h, al |
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| 300 | call empty_8042_uncond |
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| 301 | |
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| 302 | ; Apparently the UHCI spec assumes that A20 toggle |
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| 303 | ; ends with a null command (assumed to be for sychronization?) |
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| 304 | ; Put it here to see if it helps anything... |
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| 305 | mov al,0FFh ; Null command |
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| 306 | out 064h, al |
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| 307 | call empty_8042_uncond |
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| 308 | |
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| 309 | ; Verify that A20 actually is enabled. Do that by |
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| 310 | ; observing a word in low memory and the same word in |
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| 311 | ; the HMA until they are no longer coherent. Note that |
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| 312 | ; we don't do the same check in the disable case, because |
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| 313 | ; we don't want to *require* A20 masking (SYSLINUX should |
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| 314 | ; work fine without it, if the BIOS does.) |
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| 315 | .kbc_wait: push cx |
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| 316 | xor cx,cx |
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| 317 | .kbc_wait_loop: |
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| 318 | call a20_test |
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| 319 | jnz a20_done_pop |
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| 320 | loop .kbc_wait_loop |
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| 321 | |
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| 322 | pop cx |
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| 323 | ; |
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| 324 | ; Running out of options here. Final attempt: enable the "fast A20 gate" |
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| 325 | ; |
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| 326 | a20_fast: |
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| 327 | mov word [cs:A20Ptr], a20_fast |
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| 328 | in al, 092h |
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| 329 | or al,02h |
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| 330 | and al,~01h ; Don't accidentally reset the machine! |
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| 331 | out 092h, al |
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| 332 | |
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| 333 | .fast_wait: push cx |
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| 334 | xor cx,cx |
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| 335 | .fast_wait_loop: |
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| 336 | call a20_test |
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| 337 | jnz a20_done_pop |
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| 338 | loop .fast_wait_loop |
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| 339 | |
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| 340 | pop cx |
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| 341 | |
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| 342 | ; |
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| 343 | ; Oh bugger. A20 is not responding. Try frobbing it again; eventually give up |
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| 344 | ; and report failure to the user. |
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| 345 | ; |
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| 346 | dec byte [cs:A20Tries] |
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| 347 | jnz a20_dunno ; Did we get the wrong type? |
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| 348 | |
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| 349 | mov si, err_a20 |
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| 350 | pm_call pm_writestr |
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| 351 | jmp kaboom |
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| 352 | |
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| 353 | section .data16 |
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| 354 | err_a20 db CR, LF, 'A20 gate not responding!', CR, LF, 0 |
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| 355 | section .text16 |
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| 356 | |
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| 357 | ; |
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| 358 | ; A20 unmasked, proceed... |
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| 359 | ; |
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| 360 | a20_done_pop: pop cx |
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| 361 | a20_done: popad |
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| 362 | ret |
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| 363 | |
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| 364 | ; |
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| 365 | ; This routine tests if A20 is enabled (ZF = 0). This routine |
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| 366 | ; must not destroy any register contents. |
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| 367 | ; |
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| 368 | ; The no-write early out avoids the io_delay in the (presumably common) |
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| 369 | ; case of A20 already enabled (e.g. from a previous call.) |
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| 370 | ; |
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| 371 | a20_test: |
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| 372 | push es |
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| 373 | push cx |
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| 374 | push eax |
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| 375 | mov cx,0FFFFh ; HMA = segment 0FFFFh |
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| 376 | mov es,cx |
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| 377 | mov eax,[cs:A20Test] |
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| 378 | mov cx,32 ; Loop count |
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| 379 | jmp .test ; First iteration = early out |
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| 380 | .wait: add eax,0x430aea41 ; A large prime number |
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| 381 | mov [cs:A20Test],eax |
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| 382 | io_delay ; Serialize, and fix delay |
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| 383 | .test: cmp eax,[es:A20Test+10h] |
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| 384 | loopz .wait |
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| 385 | .done: pop eax |
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| 386 | pop cx |
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| 387 | pop es |
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| 388 | ret |
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| 389 | |
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| 390 | ; |
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| 391 | ; Routine to empty the 8042 KBC controller. If dl != 0 |
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| 392 | ; then we will test A20 in the loop and exit if A20 is |
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| 393 | ; suddenly enabled. |
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| 394 | ; |
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| 395 | empty_8042_uncond: |
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| 396 | xor dl,dl |
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| 397 | empty_8042: |
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| 398 | call a20_test |
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| 399 | jz .a20_on |
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| 400 | and dl,dl |
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| 401 | jnz .done |
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| 402 | .a20_on: io_delay |
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| 403 | in al, 064h ; Status port |
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| 404 | test al,1 |
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| 405 | jz .no_output |
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| 406 | io_delay |
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| 407 | in al, 060h ; Read input |
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| 408 | jmp short empty_8042 |
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| 409 | .no_output: |
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| 410 | test al,2 |
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| 411 | jnz empty_8042 |
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| 412 | io_delay |
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| 413 | .done: ret |
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| 414 | |
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| 415 | ; |
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| 416 | ; This initializes the protected-mode interrupt thunk set |
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| 417 | ; |
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| 418 | section .text16 |
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| 419 | pm_init: |
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| 420 | xor edi,edi |
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| 421 | mov bx,IDT |
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| 422 | mov di,IRQStubs |
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| 423 | |
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| 424 | mov eax,7aeb006ah ; push byte .. jmp short .. |
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| 425 | |
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| 426 | mov cx,8 ; 8 groups of 32 IRQs |
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| 427 | .gloop: |
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| 428 | push cx |
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| 429 | mov cx,32 ; 32 entries per group |
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| 430 | .eloop: |
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| 431 | mov [bx],di ; IDT offset [15:0] |
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| 432 | mov word [bx+2],PM_CS32 ; IDT segment |
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| 433 | mov dword [bx+4],08e00h ; IDT offset [31:16], 32-bit interrupt |
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| 434 | ; gate, CPL 0 (we don't have a TSS |
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| 435 | ; set up...) |
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| 436 | add bx,8 |
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| 437 | |
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| 438 | stosd |
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| 439 | ; Increment IRQ, decrement jmp short offset |
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| 440 | add eax,(-4 << 24)+(1 << 8) |
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| 441 | |
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| 442 | loop .eloop |
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| 443 | |
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| 444 | ; At the end of each group, replace the EBxx with |
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| 445 | ; the final E9xxxxxxxx |
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| 446 | add di,3 |
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| 447 | mov byte [di-5],0E9h ; JMP NEAR |
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| 448 | mov edx,pm_irq |
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| 449 | sub edx,edi |
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| 450 | mov [di-4],edx |
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| 451 | |
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| 452 | add eax,(0x80 << 24) ; Proper offset for the next one |
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| 453 | pop cx |
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| 454 | loop .gloop |
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| 455 | |
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| 456 | ret |
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| 457 | |
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| 458 | ; pm_init is called before bss clearing, so put these |
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| 459 | ; in .earlybss! |
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| 460 | section .earlybss |
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| 461 | alignb 8 |
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| 462 | IDT: resq 256 |
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| 463 | global RealModeSSSP |
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| 464 | RealModeSSSP resd 1 ; Real-mode SS:SP |
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| 465 | |
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| 466 | section .gentextnr ; Autogenerated 32-bit code |
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| 467 | IRQStubs: resb 4*256+3*8 |
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| 468 | |
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| 469 | section .text16 |
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| 470 | |
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| 471 | %include "callback.inc" ; Real-mode callbacks |
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