1 | #include <efi.h> |
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2 | #include <efilib.h> |
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3 | |
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4 | /* this example program changes the Reserved Page Route (RPR) bit on ICH10's General |
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5 | * Control And Status Register (GCS) from LPC to PCI. In practical terms, it routes |
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6 | * outb to port 80h to the PCI bus. */ |
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7 | |
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8 | #define GCS_OFFSET_ADDR 0x3410 |
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9 | #define GCS_RPR_SHIFT 2 |
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10 | #define GCS_RPR_PCI 1 |
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11 | #define GCS_RPR_LPC 0 |
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12 | |
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13 | #define VENDOR_ID_INTEL 0x8086 |
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14 | #define DEVICE_ID_LPCIF 0x3a16 |
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15 | #define DEVICE_ID_COUGARPOINT_LPCIF 0x1c56 |
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16 | |
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17 | static EFI_HANDLE ImageHandle; |
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18 | |
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19 | typedef struct { |
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20 | uint16_t vendor_id; /* 00-01 */ |
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21 | uint16_t device_id; /* 02-03 */ |
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22 | char pad[0xEB]; /* 04-EF */ |
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23 | uint32_t rcba; /* F0-F3 */ |
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24 | uint32_t reserved[3]; /* F4-FF */ |
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25 | } lpcif_t; |
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26 | |
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27 | static inline void set_bit(volatile uint32_t *flag, int bit, int value) |
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28 | { |
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29 | uint32_t val = *flag; |
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30 | Print(L"current value is 0x%2x\n", val); |
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31 | |
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32 | if (value) { |
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33 | val |= (1 << bit); |
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34 | } else { |
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35 | val &= ~(1 << bit); |
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36 | } |
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37 | Print(L"setting value to 0x%2x\n", val); |
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38 | *flag = val; |
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39 | val = *flag; |
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40 | Print(L"new value is 0x%2x\n", val); |
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41 | } |
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42 | |
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43 | static inline int configspace_matches_ids(void *config, uint32_t vendor_id, |
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44 | uint32_t device_id) |
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45 | { |
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46 | uint32_t *cfg = config; |
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47 | if (cfg[0] == vendor_id && cfg[1] == device_id) |
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48 | return 1; |
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49 | return 0; |
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50 | } |
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51 | |
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52 | static int is_device(EFI_PCI_IO *pciio, uint16_t vendor_id, uint16_t device_id) |
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53 | { |
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54 | lpcif_t lpcif; |
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55 | EFI_STATUS rc; |
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56 | |
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57 | rc = uefi_call_wrapper(pciio->Pci.Read, 5, pciio, EfiPciIoWidthUint16, 0, 2, &lpcif); |
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58 | if (EFI_ERROR(rc)) |
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59 | return 0; |
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60 | |
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61 | if (vendor_id == lpcif.vendor_id && device_id == lpcif.device_id) |
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62 | return 1; |
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63 | return 0; |
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64 | } |
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65 | |
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66 | static EFI_STATUS find_pci_device(uint16_t vendor_id, uint16_t device_id, |
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67 | EFI_PCI_IO **pciio) |
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68 | { |
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69 | EFI_STATUS rc; |
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70 | EFI_HANDLE *Handles; |
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71 | UINTN NoHandles; |
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72 | int i; |
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73 | |
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74 | if (!pciio) |
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75 | return EFI_INVALID_PARAMETER; |
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76 | |
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77 | rc = LibLocateHandle(ByProtocol, &PciIoProtocol, NULL, &NoHandles, |
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78 | &Handles); |
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79 | if (EFI_ERROR(rc)) |
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80 | return rc; |
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81 | |
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82 | for (i = 0; i < NoHandles; i++) { |
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83 | void *pciio_tmp = NULL; |
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84 | rc = uefi_call_wrapper(BS->OpenProtocol, 6, Handles[i], |
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85 | &PciIoProtocol, &pciio_tmp, ImageHandle, |
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86 | NULL, EFI_OPEN_PROTOCOL_GET_PROTOCOL); |
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87 | if (EFI_ERROR(rc)) |
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88 | continue; |
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89 | *pciio = pciio_tmp; |
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90 | if (!is_device(*pciio, vendor_id, device_id)) { |
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91 | *pciio = NULL; |
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92 | continue; |
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93 | } |
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94 | |
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95 | return EFI_SUCCESS; |
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96 | } |
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97 | return EFI_NOT_FOUND; |
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98 | } |
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99 | |
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100 | EFI_STATUS |
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101 | efi_main (EFI_HANDLE image_handle, EFI_SYSTEM_TABLE *systab) |
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102 | { |
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103 | InitializeLib(image_handle, systab); |
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104 | EFI_PCI_IO *pciio = NULL; |
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105 | lpcif_t lpcif; |
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106 | EFI_STATUS rc; |
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107 | struct { |
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108 | uint16_t vendor; |
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109 | uint16_t device; |
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110 | } devices[] = { |
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111 | { VENDOR_ID_INTEL, DEVICE_ID_LPCIF }, |
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112 | { VENDOR_ID_INTEL, DEVICE_ID_COUGARPOINT_LPCIF }, |
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113 | { 0, 0 } |
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114 | }; |
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115 | int i; |
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116 | |
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117 | ImageHandle = image_handle; |
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118 | for (i = 0; devices[i].vendor != 0; i++) { |
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119 | rc = find_pci_device(devices[i].vendor, devices[i].device, &pciio); |
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120 | if (EFI_ERROR(rc)) |
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121 | continue; |
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122 | } |
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123 | |
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124 | if (rc == EFI_NOT_FOUND) { |
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125 | Print(L"Device not found.\n"); |
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126 | return rc; |
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127 | } else if (EFI_ERROR(rc)) { |
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128 | return rc; |
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129 | } |
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130 | |
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131 | rc = uefi_call_wrapper(pciio->Pci.Read, 5, pciio, EfiPciIoWidthUint32, |
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132 | EFI_FIELD_OFFSET(lpcif_t, rcba), 1, &lpcif.rcba); |
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133 | if (EFI_ERROR(rc)) |
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134 | return rc; |
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135 | if (!(lpcif.rcba & 1)) { |
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136 | Print(L"rcrb is not mapped, cannot route port 80h\n"); |
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137 | return EFI_UNSUPPORTED; |
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138 | } |
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139 | lpcif.rcba &= ~1UL; |
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140 | |
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141 | Print(L"rcba: 0x%8x\n", lpcif.rcba, lpcif.rcba); |
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142 | set_bit((uint32_t *)(uint64_t)(lpcif.rcba + GCS_OFFSET_ADDR), |
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143 | GCS_RPR_SHIFT, GCS_RPR_PCI); |
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144 | |
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145 | return EFI_SUCCESS; |
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146 | } |
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