[e16e8f2] | 1 | /* |
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| 2 | * Copyright (C) 2006 Michael Brown <mbrown@fensystems.co.uk>. |
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| 3 | * |
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| 4 | * Based in part on pci.c from Etherboot 5.4, by Ken Yap and David |
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| 5 | * Munro, in turn based on the Linux kernel's PCI implementation. |
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| 6 | * |
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| 7 | * This program is free software; you can redistribute it and/or |
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| 8 | * modify it under the terms of the GNU General Public License as |
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| 9 | * published by the Free Software Foundation; either version 2 of the |
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| 10 | * License, or any later version. |
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| 11 | * |
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| 12 | * This program is distributed in the hope that it will be useful, but |
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| 13 | * WITHOUT ANY WARRANTY; without even the implied warranty of |
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| 14 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU |
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| 15 | * General Public License for more details. |
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| 16 | * |
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| 17 | * You should have received a copy of the GNU General Public License |
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| 18 | * along with this program; if not, write to the Free Software |
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| 19 | * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. |
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| 20 | */ |
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| 21 | |
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| 22 | FILE_LICENCE ( GPL2_OR_LATER ); |
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| 23 | |
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| 24 | #include <stdint.h> |
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| 25 | #include <stdlib.h> |
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| 26 | #include <stdio.h> |
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| 27 | #include <string.h> |
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| 28 | #include <errno.h> |
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| 29 | #include <gpxe/tables.h> |
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| 30 | #include <gpxe/device.h> |
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| 31 | #include <gpxe/pci.h> |
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| 32 | |
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| 33 | /** @file |
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| 34 | * |
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| 35 | * PCI bus |
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| 36 | * |
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| 37 | */ |
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| 38 | |
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| 39 | static void pcibus_remove ( struct root_device *rootdev ); |
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| 40 | |
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| 41 | /** |
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| 42 | * Read PCI BAR |
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| 43 | * |
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| 44 | * @v pci PCI device |
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| 45 | * @v reg PCI register number |
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| 46 | * @ret bar Base address register |
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| 47 | * |
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| 48 | * Reads the specified PCI base address register, including the flags |
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| 49 | * portion. 64-bit BARs will be handled automatically. If the value |
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| 50 | * of the 64-bit BAR exceeds the size of an unsigned long (i.e. if the |
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| 51 | * high dword is non-zero on a 32-bit platform), then the value |
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| 52 | * returned will be zero plus the flags for a 64-bit BAR. Unreachable |
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| 53 | * 64-bit BARs are therefore returned as uninitialised 64-bit BARs. |
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| 54 | */ |
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| 55 | static unsigned long pci_bar ( struct pci_device *pci, unsigned int reg ) { |
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| 56 | uint32_t low; |
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| 57 | uint32_t high; |
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| 58 | |
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| 59 | pci_read_config_dword ( pci, reg, &low ); |
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| 60 | if ( ( low & (PCI_BASE_ADDRESS_SPACE|PCI_BASE_ADDRESS_MEM_TYPE_MASK) ) |
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| 61 | == (PCI_BASE_ADDRESS_SPACE_MEMORY|PCI_BASE_ADDRESS_MEM_TYPE_64) ){ |
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| 62 | pci_read_config_dword ( pci, reg + 4, &high ); |
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| 63 | if ( high ) { |
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| 64 | if ( sizeof ( unsigned long ) > sizeof ( uint32_t ) ) { |
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| 65 | return ( ( ( uint64_t ) high << 32 ) | low ); |
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| 66 | } else { |
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| 67 | DBG ( "Unhandled 64-bit BAR %08x%08x\n", |
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| 68 | high, low ); |
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| 69 | return PCI_BASE_ADDRESS_MEM_TYPE_64; |
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| 70 | } |
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| 71 | } |
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| 72 | } |
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| 73 | return low; |
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| 74 | } |
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| 75 | |
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| 76 | /** |
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| 77 | * Find the start of a PCI BAR |
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| 78 | * |
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| 79 | * @v pci PCI device |
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| 80 | * @v reg PCI register number |
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| 81 | * @ret start BAR start address |
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| 82 | * |
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| 83 | * Reads the specified PCI base address register, and returns the |
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| 84 | * address portion of the BAR (i.e. without the flags). |
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| 85 | * |
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| 86 | * If the address exceeds the size of an unsigned long (i.e. if a |
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| 87 | * 64-bit BAR has a non-zero high dword on a 32-bit machine), the |
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| 88 | * return value will be zero. |
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| 89 | */ |
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| 90 | unsigned long pci_bar_start ( struct pci_device *pci, unsigned int reg ) { |
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| 91 | unsigned long bar; |
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| 92 | |
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| 93 | bar = pci_bar ( pci, reg ); |
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| 94 | if ( (bar & PCI_BASE_ADDRESS_SPACE) == PCI_BASE_ADDRESS_SPACE_MEMORY ){ |
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| 95 | return ( bar & PCI_BASE_ADDRESS_MEM_MASK ); |
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| 96 | } else { |
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| 97 | return ( bar & PCI_BASE_ADDRESS_IO_MASK ); |
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| 98 | } |
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| 99 | } |
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| 100 | |
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| 101 | /** |
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| 102 | * Read membase and ioaddr for a PCI device |
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| 103 | * |
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| 104 | * @v pci PCI device |
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| 105 | * |
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| 106 | * This scans through all PCI BARs on the specified device. The first |
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| 107 | * valid memory BAR is recorded as pci_device::membase, and the first |
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| 108 | * valid IO BAR is recorded as pci_device::ioaddr. |
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| 109 | * |
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| 110 | * 64-bit BARs are handled automatically. On a 32-bit platform, if a |
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| 111 | * 64-bit BAR has a non-zero high dword, it will be regarded as |
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| 112 | * invalid. |
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| 113 | */ |
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| 114 | static void pci_read_bases ( struct pci_device *pci ) { |
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| 115 | unsigned long bar; |
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| 116 | int reg; |
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| 117 | |
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| 118 | for ( reg = PCI_BASE_ADDRESS_0; reg <= PCI_BASE_ADDRESS_5; reg += 4 ) { |
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| 119 | bar = pci_bar ( pci, reg ); |
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| 120 | if ( bar & PCI_BASE_ADDRESS_SPACE_IO ) { |
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| 121 | if ( ! pci->ioaddr ) |
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| 122 | pci->ioaddr = |
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| 123 | ( bar & PCI_BASE_ADDRESS_IO_MASK ); |
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| 124 | } else { |
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| 125 | if ( ! pci->membase ) |
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| 126 | pci->membase = |
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| 127 | ( bar & PCI_BASE_ADDRESS_MEM_MASK ); |
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| 128 | /* Skip next BAR if 64-bit */ |
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| 129 | if ( bar & PCI_BASE_ADDRESS_MEM_TYPE_64 ) |
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| 130 | reg += 4; |
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| 131 | } |
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| 132 | } |
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| 133 | } |
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| 134 | |
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| 135 | /** |
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| 136 | * Enable PCI device |
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| 137 | * |
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| 138 | * @v pci PCI device |
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| 139 | * |
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| 140 | * Set device to be a busmaster in case BIOS neglected to do so. Also |
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| 141 | * adjust PCI latency timer to a reasonable value, 32. |
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| 142 | */ |
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| 143 | void adjust_pci_device ( struct pci_device *pci ) { |
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| 144 | unsigned short new_command, pci_command; |
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| 145 | unsigned char pci_latency; |
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| 146 | |
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| 147 | pci_read_config_word ( pci, PCI_COMMAND, &pci_command ); |
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| 148 | new_command = ( pci_command | PCI_COMMAND_MASTER | |
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| 149 | PCI_COMMAND_MEM | PCI_COMMAND_IO ); |
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| 150 | if ( pci_command != new_command ) { |
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| 151 | DBG ( "PCI BIOS has not enabled device %02x:%02x.%x! " |
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| 152 | "Updating PCI command %04x->%04x\n", pci->bus, |
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| 153 | PCI_SLOT ( pci->devfn ), PCI_FUNC ( pci->devfn ), |
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| 154 | pci_command, new_command ); |
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| 155 | pci_write_config_word ( pci, PCI_COMMAND, new_command ); |
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| 156 | } |
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| 157 | |
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| 158 | pci_read_config_byte ( pci, PCI_LATENCY_TIMER, &pci_latency); |
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| 159 | if ( pci_latency < 32 ) { |
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| 160 | DBG ( "PCI device %02x:%02x.%x latency timer is unreasonably " |
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| 161 | "low at %d. Setting to 32.\n", pci->bus, |
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| 162 | PCI_SLOT ( pci->devfn ), PCI_FUNC ( pci->devfn ), |
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| 163 | pci_latency ); |
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| 164 | pci_write_config_byte ( pci, PCI_LATENCY_TIMER, 32); |
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| 165 | } |
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| 166 | } |
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| 167 | |
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| 168 | /** |
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| 169 | * Probe a PCI device |
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| 170 | * |
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| 171 | * @v pci PCI device |
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| 172 | * @ret rc Return status code |
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| 173 | * |
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| 174 | * Searches for a driver for the PCI device. If a driver is found, |
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| 175 | * its probe() routine is called. |
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| 176 | */ |
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| 177 | static int pci_probe ( struct pci_device *pci ) { |
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| 178 | struct pci_driver *driver; |
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| 179 | struct pci_device_id *id; |
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| 180 | unsigned int i; |
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| 181 | int rc; |
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| 182 | |
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| 183 | DBG ( "Adding PCI device %02x:%02x.%x (%04x:%04x mem %lx io %lx " |
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| 184 | "irq %d)\n", pci->bus, PCI_SLOT ( pci->devfn ), |
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| 185 | PCI_FUNC ( pci->devfn ), pci->vendor, pci->device, |
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| 186 | pci->membase, pci->ioaddr, pci->irq ); |
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| 187 | |
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| 188 | for_each_table_entry ( driver, PCI_DRIVERS ) { |
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| 189 | for ( i = 0 ; i < driver->id_count ; i++ ) { |
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| 190 | id = &driver->ids[i]; |
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| 191 | if ( ( id->vendor != PCI_ANY_ID ) && |
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| 192 | ( id->vendor != pci->vendor ) ) |
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| 193 | continue; |
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| 194 | if ( ( id->device != PCI_ANY_ID ) && |
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| 195 | ( id->device != pci->device ) ) |
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| 196 | continue; |
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| 197 | pci->driver = driver; |
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| 198 | pci->driver_name = id->name; |
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| 199 | DBG ( "...using driver %s\n", pci->driver_name ); |
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| 200 | if ( ( rc = driver->probe ( pci, id ) ) != 0 ) { |
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| 201 | DBG ( "......probe failed\n" ); |
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| 202 | continue; |
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| 203 | } |
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| 204 | return 0; |
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| 205 | } |
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| 206 | } |
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| 207 | |
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| 208 | DBG ( "...no driver found\n" ); |
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| 209 | return -ENOTTY; |
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| 210 | } |
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| 211 | |
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| 212 | /** |
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| 213 | * Remove a PCI device |
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| 214 | * |
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| 215 | * @v pci PCI device |
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| 216 | */ |
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| 217 | static void pci_remove ( struct pci_device *pci ) { |
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| 218 | pci->driver->remove ( pci ); |
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| 219 | DBG ( "Removed PCI device %02x:%02x.%x\n", pci->bus, |
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| 220 | PCI_SLOT ( pci->devfn ), PCI_FUNC ( pci->devfn ) ); |
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| 221 | } |
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| 222 | |
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| 223 | /** |
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| 224 | * Probe PCI root bus |
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| 225 | * |
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| 226 | * @v rootdev PCI bus root device |
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| 227 | * |
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| 228 | * Scans the PCI bus for devices and registers all devices it can |
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| 229 | * find. |
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| 230 | */ |
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| 231 | static int pcibus_probe ( struct root_device *rootdev ) { |
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| 232 | struct pci_device *pci = NULL; |
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| 233 | unsigned int max_bus; |
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| 234 | unsigned int bus; |
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| 235 | unsigned int devfn; |
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| 236 | uint8_t hdrtype = 0; |
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| 237 | uint32_t tmp; |
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| 238 | int rc; |
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| 239 | |
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| 240 | max_bus = pci_max_bus(); |
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| 241 | for ( bus = 0 ; bus <= max_bus ; bus++ ) { |
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| 242 | for ( devfn = 0 ; devfn <= 0xff ; devfn++ ) { |
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| 243 | |
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| 244 | /* Allocate struct pci_device */ |
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| 245 | if ( ! pci ) |
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| 246 | pci = malloc ( sizeof ( *pci ) ); |
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| 247 | if ( ! pci ) { |
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| 248 | rc = -ENOMEM; |
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| 249 | goto err; |
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| 250 | } |
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| 251 | memset ( pci, 0, sizeof ( *pci ) ); |
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| 252 | pci->bus = bus; |
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| 253 | pci->devfn = devfn; |
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| 254 | |
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| 255 | /* Skip all but the first function on |
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| 256 | * non-multifunction cards |
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| 257 | */ |
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| 258 | if ( PCI_FUNC ( devfn ) == 0 ) { |
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| 259 | pci_read_config_byte ( pci, PCI_HEADER_TYPE, |
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| 260 | &hdrtype ); |
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| 261 | } else if ( ! ( hdrtype & 0x80 ) ) { |
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| 262 | continue; |
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| 263 | } |
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| 264 | |
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| 265 | /* Check for physical device presence */ |
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| 266 | pci_read_config_dword ( pci, PCI_VENDOR_ID, &tmp ); |
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| 267 | if ( ( tmp == 0xffffffff ) || ( tmp == 0 ) ) |
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| 268 | continue; |
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| 269 | |
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| 270 | /* Populate struct pci_device */ |
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| 271 | pci->vendor = ( tmp & 0xffff ); |
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| 272 | pci->device = ( tmp >> 16 ); |
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| 273 | pci_read_config_dword ( pci, PCI_REVISION, &tmp ); |
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| 274 | pci->class = ( tmp >> 8 ); |
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| 275 | pci_read_config_byte ( pci, PCI_INTERRUPT_LINE, |
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| 276 | &pci->irq ); |
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| 277 | pci_read_bases ( pci ); |
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| 278 | |
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| 279 | /* Add to device hierarchy */ |
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| 280 | snprintf ( pci->dev.name, sizeof ( pci->dev.name ), |
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| 281 | "PCI%02x:%02x.%x", bus, |
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| 282 | PCI_SLOT ( devfn ), PCI_FUNC ( devfn ) ); |
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| 283 | pci->dev.desc.bus_type = BUS_TYPE_PCI; |
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| 284 | pci->dev.desc.location = PCI_BUSDEVFN (bus, devfn); |
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| 285 | pci->dev.desc.vendor = pci->vendor; |
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| 286 | pci->dev.desc.device = pci->device; |
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| 287 | pci->dev.desc.class = pci->class; |
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| 288 | pci->dev.desc.ioaddr = pci->ioaddr; |
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| 289 | pci->dev.desc.irq = pci->irq; |
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| 290 | pci->dev.parent = &rootdev->dev; |
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| 291 | list_add ( &pci->dev.siblings, &rootdev->dev.children); |
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| 292 | INIT_LIST_HEAD ( &pci->dev.children ); |
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| 293 | |
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| 294 | /* Look for a driver */ |
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| 295 | if ( pci_probe ( pci ) == 0 ) { |
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| 296 | /* pcidev registered, we can drop our ref */ |
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| 297 | pci = NULL; |
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| 298 | } else { |
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| 299 | /* Not registered; re-use struct pci_device */ |
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| 300 | list_del ( &pci->dev.siblings ); |
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| 301 | } |
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| 302 | } |
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| 303 | } |
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| 304 | |
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| 305 | free ( pci ); |
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| 306 | return 0; |
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| 307 | |
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| 308 | err: |
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| 309 | free ( pci ); |
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| 310 | pcibus_remove ( rootdev ); |
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| 311 | return rc; |
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| 312 | } |
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| 313 | |
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| 314 | /** |
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| 315 | * Remove PCI root bus |
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| 316 | * |
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| 317 | * @v rootdev PCI bus root device |
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| 318 | */ |
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| 319 | static void pcibus_remove ( struct root_device *rootdev ) { |
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| 320 | struct pci_device *pci; |
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| 321 | struct pci_device *tmp; |
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| 322 | |
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| 323 | list_for_each_entry_safe ( pci, tmp, &rootdev->dev.children, |
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| 324 | dev.siblings ) { |
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| 325 | pci_remove ( pci ); |
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| 326 | list_del ( &pci->dev.siblings ); |
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| 327 | free ( pci ); |
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| 328 | } |
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| 329 | } |
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| 330 | |
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| 331 | /** PCI bus root device driver */ |
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| 332 | static struct root_driver pci_root_driver = { |
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| 333 | .probe = pcibus_probe, |
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| 334 | .remove = pcibus_remove, |
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| 335 | }; |
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| 336 | |
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| 337 | /** PCI bus root device */ |
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| 338 | struct root_device pci_root_device __root_device = { |
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| 339 | .dev = { .name = "PCI" }, |
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| 340 | .driver = &pci_root_driver, |
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| 341 | }; |
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