| 1 | /*- |
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| 2 | * Copyright (c) 2002-2007 Sam Leffler, Errno Consulting |
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| 3 | * All rights reserved. |
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| 4 | * |
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| 5 | * Modified for gPXE, July 2009, by Joshua Oreman <oremanj@rwcr.net> |
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| 6 | * Original from Linux kernel 2.6.30. |
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| 7 | * |
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| 8 | * Redistribution and use in source and binary forms, with or without |
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| 9 | * modification, are permitted provided that the following conditions |
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| 10 | * are met: |
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| 11 | * 1. Redistributions of source code must retain the above copyright |
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| 12 | * notice, this list of conditions and the following disclaimer, |
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| 13 | * without modification. |
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| 14 | * 2. Redistributions in binary form must reproduce at minimum a disclaimer |
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| 15 | * similar to the "NO WARRANTY" disclaimer below ("Disclaimer") and any |
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| 16 | * redistribution must be conditioned upon including a substantially |
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| 17 | * similar Disclaimer requirement for further binary redistribution. |
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| 18 | * 3. Neither the names of the above-listed copyright holders nor the names |
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| 19 | * of any contributors may be used to endorse or promote products derived |
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| 20 | * from this software without specific prior written permission. |
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| 21 | * |
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| 22 | * Alternatively, this software may be distributed under the terms of the |
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| 23 | * GNU General Public License ("GPL") version 2 as published by the Free |
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| 24 | * Software Foundation. |
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| 25 | * |
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| 26 | * NO WARRANTY |
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| 27 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS |
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| 28 | * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT |
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| 29 | * LIMITED TO, THE IMPLIED WARRANTIES OF NONINFRINGEMENT, MERCHANTIBILITY |
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| 30 | * AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL |
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| 31 | * THE COPYRIGHT HOLDERS OR CONTRIBUTORS BE LIABLE FOR SPECIAL, EXEMPLARY, |
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| 32 | * OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF |
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| 33 | * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS |
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| 34 | * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER |
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| 35 | * IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) |
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| 36 | * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF |
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| 37 | * THE POSSIBILITY OF SUCH DAMAGES. |
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| 38 | * |
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| 39 | */ |
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| 40 | |
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| 41 | /* |
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| 42 | * Defintions for the Atheros Wireless LAN controller driver. |
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| 43 | */ |
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| 44 | #ifndef _DEV_ATH_ATHVAR_H |
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| 45 | #define _DEV_ATH_ATHVAR_H |
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| 46 | |
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| 47 | FILE_LICENCE ( BSD3 ); |
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| 48 | |
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| 49 | #include "ath5k.h" |
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| 50 | #include <gpxe/iobuf.h> |
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| 51 | |
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| 52 | #define ATH_RXBUF 16 /* number of RX buffers */ |
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| 53 | #define ATH_TXBUF 16 /* number of TX buffers */ |
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| 54 | |
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| 55 | struct ath5k_buf { |
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| 56 | struct list_head list; |
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| 57 | unsigned int flags; /* rx descriptor flags */ |
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| 58 | struct ath5k_desc *desc; /* virtual addr of desc */ |
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| 59 | u32 daddr; /* physical addr of desc */ |
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| 60 | struct io_buffer *iob; /* I/O buffer for buf */ |
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| 61 | u32 iobaddr;/* physical addr of iob data */ |
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| 62 | }; |
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| 63 | |
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| 64 | /* |
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| 65 | * Data transmit queue state. One of these exists for each |
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| 66 | * hardware transmit queue. Packets sent to us from above |
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| 67 | * are assigned to queues based on their priority. Not all |
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| 68 | * devices support a complete set of hardware transmit queues. |
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| 69 | * For those devices the array sc_ac2q will map multiple |
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| 70 | * priorities to fewer hardware queues (typically all to one |
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| 71 | * hardware queue). |
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| 72 | */ |
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| 73 | struct ath5k_txq { |
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| 74 | unsigned int qnum; /* hardware q number */ |
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| 75 | u32 *link; /* link ptr in last TX desc */ |
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| 76 | struct list_head q; /* transmit queue */ |
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| 77 | int setup; |
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| 78 | }; |
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| 79 | |
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| 80 | #if CHAN_DEBUG |
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| 81 | #define ATH_CHAN_MAX (26+26+26+200+200) |
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| 82 | #else |
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| 83 | #define ATH_CHAN_MAX (14+14+14+252+20) |
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| 84 | #endif |
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| 85 | |
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| 86 | /* Software Carrier, keeps track of the driver state |
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| 87 | * associated with an instance of a device */ |
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| 88 | struct ath5k_softc { |
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| 89 | struct pci_device *pdev; /* for dma mapping */ |
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| 90 | void *iobase; /* address of the device */ |
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| 91 | struct net80211_device *dev; /* IEEE 802.11 common */ |
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| 92 | struct ath5k_hw *ah; /* Atheros HW */ |
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| 93 | struct net80211_hw_info *hwinfo; |
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| 94 | int curband; |
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| 95 | int irq_ena; /* interrupts enabled */ |
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| 96 | |
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| 97 | struct ath5k_buf *bufptr; /* allocated buffer ptr */ |
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| 98 | struct ath5k_desc *desc; /* TX/RX descriptors */ |
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| 99 | u32 desc_daddr; /* DMA (physical) address */ |
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| 100 | size_t desc_len; /* size of TX/RX descriptors */ |
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| 101 | u16 cachelsz; /* cache line size */ |
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| 102 | |
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| 103 | int status; |
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| 104 | #define ATH_STAT_INVALID 0x01 /* disable hardware accesses */ |
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| 105 | #define ATH_STAT_MRRETRY 0x02 /* multi-rate retry support */ |
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| 106 | #define ATH_STAT_PROMISC 0x04 |
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| 107 | #define ATH_STAT_LEDSOFT 0x08 /* enable LED gpio status */ |
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| 108 | #define ATH_STAT_STARTED 0x10 /* opened & irqs enabled */ |
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| 109 | |
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| 110 | unsigned int filter_flags; /* HW flags, AR5K_RX_FILTER_* */ |
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| 111 | unsigned int curmode; /* current phy mode */ |
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| 112 | struct net80211_channel *curchan; /* current h/w channel */ |
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| 113 | |
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| 114 | enum ath5k_int imask; /* interrupt mask copy */ |
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| 115 | |
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| 116 | u8 bssidmask[ETH_ALEN]; |
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| 117 | |
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| 118 | unsigned int rxbufsize; /* rx size based on mtu */ |
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| 119 | struct list_head rxbuf; /* receive buffer */ |
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| 120 | u32 *rxlink; /* link ptr in last RX desc */ |
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| 121 | |
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| 122 | struct list_head txbuf; /* transmit buffer */ |
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| 123 | unsigned int txbuf_len; /* buf count in txbuf list */ |
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| 124 | struct ath5k_txq txq; /* tx queue */ |
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| 125 | |
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| 126 | struct { |
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| 127 | u16 gpio; |
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| 128 | unsigned polarity; |
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| 129 | } rf_kill; |
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| 130 | |
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| 131 | int last_calib_ticks; |
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| 132 | |
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| 133 | int power_level; /* Requested tx power in dbm */ |
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| 134 | int assoc; /* assocate state */ |
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| 135 | |
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| 136 | int hw_rate; /* Hardware tx rate code */ |
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| 137 | int hw_rtscts_rate; /* Hardware rts/cts rate code */ |
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| 138 | }; |
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| 139 | |
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| 140 | #define ath5k_hw_hasbssidmask(_ah) \ |
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| 141 | (ath5k_hw_get_capability(_ah, AR5K_CAP_BSSIDMASK, 0, NULL) == 0) |
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| 142 | #define ath5k_hw_hasveol(_ah) \ |
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| 143 | (ath5k_hw_get_capability(_ah, AR5K_CAP_VEOL, 0, NULL) == 0) |
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| 144 | |
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| 145 | #endif |
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