[e16e8f2] | 1 | |
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| 2 | #ifndef __EEPRO100_H_ |
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| 3 | #define __EEPRO100_H_ |
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| 4 | |
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| 5 | FILE_LICENCE ( GPL2_OR_LATER ); |
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| 6 | |
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| 7 | #define CONGENB 0 /* Enable congestion control in the DP83840. */ |
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| 8 | #define TX_FIFO 8 /* Tx FIFO threshold in 4 byte units, 0-15 */ |
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| 9 | #define RX_FIFO 8 /* Rx FIFO threshold, default 32 bytes. */ |
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| 10 | #define TX_DMA_COUNT 0 /* Tx DMA burst length, 0-127, default 0. */ |
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| 11 | #define RX_DMA_COUNT 0 /* Rx DMA length, 0 means no preemption. */ |
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| 12 | #define CU_CMD_TIMEOUT 1000 /* CU command accept timeout in microseconds */ |
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| 13 | #define LINK_CHECK_PERIOD 1000 /* # of poll() calls between link checks */ |
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| 14 | |
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| 15 | #define RFD_PACKET_LEN 1518 |
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| 16 | #define RFD_IOB_LEN 1536 |
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| 17 | #define RFD_HEADER_LEN 16 |
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| 18 | #define CB_ALIGN 2 /* Alignment of command blocks */ |
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| 19 | |
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| 20 | #define RFD_COUNT 4 |
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| 21 | #define TCB_COUNT 4 |
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| 22 | #define RX_RING_BYTES ( RFD_COUNT * sizeof ( struct ifec_rfd ) ) |
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| 23 | #define TX_RING_BYTES ( TCB_COUNT * sizeof ( struct ifec_tcb ) ) |
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| 24 | |
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| 25 | /* some EEPROM addresses */ |
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| 26 | #define EEPROM_ADDR_MAC_0 0 |
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| 27 | #define EEPROM_ADDR_MDIO_REGISTER 6 |
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| 28 | |
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| 29 | /* Control / Status Register byte offsets - SDM Table 11 */ |
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| 30 | enum CSROffsets { |
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| 31 | SCBStatus=0, SCBCmd=2, SCBPointer = 4, |
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| 32 | CSRPort=8, CSRFlash=12, CSREeprom = 14, |
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| 33 | CSRCtrlMDI=16, CSREarlyRx=20 |
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| 34 | }; |
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| 35 | |
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| 36 | /* System Control Block Command Word - SDM Table 12 */ |
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| 37 | enum SCBCmdBits { |
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| 38 | /* SCB Interrupt Masks - SDM Table 14 */ |
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| 39 | SCBMaskCmdDone=0x8000, SCBMaskRxDone=0x4000, SCBMaskCmdIdle=0x2000, |
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| 40 | SCBMaskRxSuspend=0x1000, SCBMaskEarlyRx=0x0800, SCBMaskFlowCtl=0x0400, |
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| 41 | SCBTriggerIntr=0x0200, SCBMaskAll=0x0100, |
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| 42 | /* SCB Control Commands - SDM Table 14-16 */ |
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| 43 | CUStart=0x0010, CUResume=0x0020, CUStatsAddr=0x0040, |
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| 44 | CUShowStats=0x0050, CUCmdBase=0x0060, CUDumpStats=0x0070, |
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| 45 | RUStart=0x0001, RUResume=0x0002, RUAbort=0x0004, |
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| 46 | RUAddrLoad=0x0006, RUResumeNoResources=0x0007 |
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| 47 | }; |
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| 48 | |
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| 49 | enum SCBPortCmds { |
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| 50 | PortReset=0, PortSelfTest=1, PortPartialReset=2, PortDump=3 |
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| 51 | }; |
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| 52 | |
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| 53 | /* Action Commands - SDM Table 14,37 */ |
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| 54 | enum ActionCommands { |
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| 55 | CmdNOp = 0, CmdIASetup = 1, CmdConfigure = 2, |
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| 56 | CmdMulticastList = 3, CmdTx = 4, CmdTDR = 5, |
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| 57 | CmdDump = 6, CmdDiagnose = 7, |
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| 58 | /* And some extra flags: */ |
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| 59 | CmdEndOfList = 0x8000, |
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| 60 | CmdSuspend = 0x4000, CmdIntr = 0x2000, CmdTxFlex = 0x0008 |
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| 61 | }; |
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| 62 | |
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| 63 | enum TCBBits { |
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| 64 | TCB_C=0x8000, TCB_OK=0x2000, TCB_U=0x1000 |
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| 65 | }; |
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| 66 | |
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| 67 | enum RFDBits { |
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| 68 | /* Status Word Bits */ |
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| 69 | RFDRxCol=0x0001, RFDIAMatch=0x0002, RFDNoMatch=0x0004, |
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| 70 | RFDReserved3=0x0008, RFDRxErr=0x0010, RFDEthType=0x0020, |
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| 71 | RFDReserved6=0x0040, RFDShort=0x0080, RFDDMAOverrun=0x0100, |
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| 72 | RFDNoBufs=0x0200, RFDCRCAlign=0x0400, RFDCRCError=0x0800, |
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| 73 | RFDReserved12=0x1000, RFD_OK=0x2000, RFDComplete=0x8000, |
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| 74 | /* Command Word Bits */ |
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| 75 | //RFD_SF=0x0008, RFDSuspend=0x4000, RFDEndOfList=0x8000, |
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| 76 | /* Other */ |
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| 77 | RFDMaskCount=0x3FFF |
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| 78 | }; |
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| 79 | |
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| 80 | enum phy_chips { |
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| 81 | NonSuchPhy=0, I82553AB, I82553C, |
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| 82 | I82503, DP83840, S80C240, |
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| 83 | S80C24, PhyUndefined, DP83840A=10 |
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| 84 | }; |
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| 85 | |
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| 86 | /* Serial EEPROM section. |
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| 87 | A "bit" grungy, but we work our way through bit-by-bit :->. */ |
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| 88 | /* EEPROM_Ctrl bits. */ |
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| 89 | #define EE_SHIFT_CLK 0x01 /* EEPROM shift clock. */ |
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| 90 | #define EE_CS 0x02 /* EEPROM chip select. */ |
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| 91 | #define EE_DATA_WRITE 0x04 /* EEPROM chip data in. */ |
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| 92 | #define EE_DATA_READ 0x08 /* EEPROM chip data out. */ |
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| 93 | #define EE_ENB ( 0x4800 | EE_CS ) |
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| 94 | |
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| 95 | /* Elements of the dump_statistics block. This block must be lword aligned. */ |
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| 96 | struct ifec_stats { |
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| 97 | u32 |
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| 98 | tx_good_frames, tx_coll16_errs, tx_late_colls, |
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| 99 | tx_underruns, tx_lost_carrier, tx_deferred, |
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| 100 | tx_one_colls, tx_multi_colls, tx_total_colls, |
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| 101 | rx_good_frames, rx_crc_errs, rx_align_errs, |
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| 102 | rx_resource_errs, rx_overrun_errs, rx_colls_errs, |
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| 103 | rx_runt_errs, done_marker; |
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| 104 | }; |
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| 105 | |
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| 106 | struct ifec_tcb { /* A Transmit Command Block & TBD. Must be */ |
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| 107 | volatile s16 status; /* word (even address) aligned */ |
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| 108 | u16 command; |
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| 109 | u32 link; /* PHYSICAL next ifec_tcb, doesn't change */ |
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| 110 | u32 tbda_addr; /* TBD Array, points to TBD below */ |
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| 111 | s32 count; /* # of TBD, Tx start thresh., etc. */ |
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| 112 | /* The following constitutes a Transmit Buffer Descriptor (TBD). |
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| 113 | * TBDs must be aligned on an even address (word-aligned). */ |
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| 114 | u32 tbd_addr0; /* PHYSICAL ptr to Tx data */ |
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| 115 | s32 tbd_size0; /* Length of Tx data */ |
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| 116 | /* Driver-specific data; not part of TCB format. */ |
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| 117 | struct io_buffer *iob; /* Exists from tx() to completion poll() */ |
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| 118 | struct ifec_tcb *next; /* VIRTUAL next ifec_tcb, doesn't change */ |
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| 119 | }; |
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| 120 | |
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| 121 | struct ifec_rfd { /* A Receive Frame Descriptor. Must be aligned */ |
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| 122 | volatile s16 status; /* on a physical word (even address) */ |
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| 123 | s16 command; |
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| 124 | u32 link; /* PHYSICAL next ifec_rfd, doesn't change */ |
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| 125 | u32 rx_buf_addr; /* Unused. Flex rx mode is not documented */ |
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| 126 | u16 count; /* and may be impossible */ |
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| 127 | u16 size; |
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| 128 | char packet[RFD_PACKET_LEN]; |
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| 129 | }; |
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| 130 | |
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| 131 | struct ifec_ias { /* Individual Address Setup command block. */ |
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| 132 | volatile s16 status; /* Must be word (even address) aligned. */ |
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| 133 | u16 command; |
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| 134 | u32 link; /* PHYSICAL next command block to process */ |
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| 135 | u8 ia[6]; |
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| 136 | }; |
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| 137 | |
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| 138 | struct ifec_cfg { /* The configure command format. */ |
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| 139 | volatile s16 status; |
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| 140 | u16 command; |
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| 141 | u32 link; /* PHYSICAL next command block to process */ |
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| 142 | u8 byte[22]; /* 22 configuration bytes */ |
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| 143 | }; |
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| 144 | |
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| 145 | struct ifec_private { |
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| 146 | unsigned long ioaddr; |
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| 147 | struct ifec_stats stats; |
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| 148 | unsigned short mdio_register; |
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| 149 | |
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| 150 | struct ifec_tcb *tcbs; |
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| 151 | struct ifec_rfd *rfds[RFD_COUNT]; |
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| 152 | struct ifec_tcb *tcb_head, *tcb_tail; |
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| 153 | struct io_buffer *tx_iobs[TCB_COUNT]; |
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| 154 | struct io_buffer *rx_iobs[RFD_COUNT]; |
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| 155 | int cur_rx; |
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| 156 | int tx_curr; |
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| 157 | int tx_tail; |
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| 158 | int tx_cnt; |
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| 159 | /* |
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| 160 | * The configured flag indicates if a Config command was last issued. |
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| 161 | * The following attempt to issue a command (in ifec_tx_wake) will |
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| 162 | * use a START rather than RESUME SCB command. It seems the card won't |
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| 163 | * RESUME after a configure command. |
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| 164 | */ |
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| 165 | int configured; |
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| 166 | struct spi_bit_basher spi; |
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| 167 | struct spi_device eeprom; |
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| 168 | |
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| 169 | }; |
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| 170 | |
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| 171 | /**************************** Function prototypes ****************************/ |
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| 172 | |
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| 173 | /* PCI device API prototypes */ |
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| 174 | static int ifec_pci_probe ( struct pci_device*, const struct pci_device_id*); |
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| 175 | static void ifec_pci_remove ( struct pci_device *pci ); |
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| 176 | |
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| 177 | /* Network device API prototypes */ |
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| 178 | static void ifec_net_close ( struct net_device* ); |
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| 179 | static void ifec_net_irq ( struct net_device*, int enable ); |
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| 180 | static int ifec_net_open ( struct net_device* ); |
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| 181 | static void ifec_net_poll ( struct net_device* ); |
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| 182 | static int ifec_net_transmit ( struct net_device*, struct io_buffer *iobuf ); |
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| 183 | |
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| 184 | /* Local function prototypes */ |
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| 185 | static void ifec_init_eeprom ( struct net_device * ); |
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| 186 | static int ifec_link_check ( struct net_device * ); |
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| 187 | static void ifec_link_update ( struct net_device * ); |
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| 188 | static int ifec_mdio_read ( struct net_device *, int phy, int location ); |
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| 189 | static void ifec_mdio_setup ( struct net_device *, int options ); |
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| 190 | static int ifec_mdio_write ( struct net_device *, int phy, int loc, int val); |
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| 191 | static void ifec_reset ( struct net_device * ); |
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| 192 | static void ifec_free ( struct net_device * ); |
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| 193 | static void ifec_rfd_init ( struct ifec_rfd *rfd, s16 command, u32 link ); |
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| 194 | static void ifec_rx_process ( struct net_device * ); |
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| 195 | static void ifec_reprime_ru ( struct net_device * ); |
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| 196 | static void ifec_check_ru_status ( struct net_device *, unsigned short ); |
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| 197 | static int ifec_get_rx_desc ( struct net_device *, int ,int ,int ); |
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| 198 | static void ifec_refill_rx_ring ( struct net_device * ); |
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| 199 | static int ifec_rx_setup ( struct net_device * ); |
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| 200 | static int ifec_scb_cmd ( struct net_device *, u32 ptr, u8 cmd ); |
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| 201 | static int ifec_scb_cmd_wait ( struct net_device * ); |
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| 202 | static void ifec_tx_process ( struct net_device * ); |
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| 203 | static int ifec_tx_setup ( struct net_device * ); |
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| 204 | static void ifec_tx_wake ( struct net_device * ); |
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| 205 | |
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| 206 | #endif |
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